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| //////////////////////////////////////////////////////////////////////////////// | ||
| template <typename T, int n> | ||
| struct DataBundle { |
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Why not put DataBundle in a header file in the include directory?
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We could, but I want the idea to be that the memory utilities work with any bundle-esque class, where DataBundle is one example.
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I like the plan to make the memory utilities generic, but I still think providing this bundle class in a separate header would be useful.
DirectProgramming/DPC++FPGA/Tutorials/DesignPatterns/data_bundle/src/data_bundle.cpp
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| class USMProducerID; | ||
| class USMConsumerID; | ||
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| event SubmitBufferProducer(queue &q, buffer<int, 1> &in_buf, size_t count) { |
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Should we also encapsulate these producers/consumers into a shared header? Don't you already have this in the FakeIOPipes?
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I was trying to avoid having anything about SYCL queues in the shared header files.
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Do you think that's an important goal? I think if it's generically useful, which this clearly is, we should try to put it into the include directory. Maybe we isolate it into a special sub-directory?
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I see them as orthogonal, but I understand the confusion because of what I named this project.
I think we should have a generic "bundle" class that has operator[] semantics, but that didn't end up being my goal here (despite the name, sorry).
The goal here is to make the MemoryToPipe and PipeToMemory, and don't think these methods should depend on a specific bundle type.
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Wow. Early monday. My response makes no sense.
I have no problem throwing the actual kernels into the file, but I kind of like the user having to wrap all of our utilities in kernels. That way they know what they are submitting.
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| template<typename Pipe, typename PtrT> | ||
| void StreamToPipe(PtrT out_ptr, size_t count_div_elements_per_cycle) { |
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Shouldn't this be called PipeToMemory?
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Ya. I messed up. Not too worried about names right now.
whitepau
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The readme doesn't contain any info about using data_bundle to pass data in parallel through a pipe; I think that deserves a shout-out.
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| ## Purpose | ||
| This tutorial demonstrates how a kernel in a DPC++ FPGA program transfers |
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| This tutorial demonstrates how a kernel in a DPC++ FPGA program transfers | |
| This tutorial demonstrates how a kernel in a DPC++ FPGA program streams |
I would like to lean on the idea that pipes are streams. particularly with an eye to IP Authoring.
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