[FPGA] Update zero_copy_kernel sample to support IP-Authoring#11
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wangdi4 wants to merge 4 commits intodevelopmentfrom
Open
[FPGA] Update zero_copy_kernel sample to support IP-Authoring#11wangdi4 wants to merge 4 commits intodevelopmentfrom
wangdi4 wants to merge 4 commits intodevelopmentfrom
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tiwaria1
requested changes
Sep 21, 2023
| #if defined(IS_BSP) | ||
| Type* in_zero_copy = malloc_host<Type>(size, q.get_context()); | ||
| Type* out_zero_copy = malloc_host<Type>(size, q.get_context()); | ||
| #else |
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Add a comment here similar to the one in this commit: https://github.com/oneapi-src/oneAPI-samples/pull/1890/files#diff-5bf4c46164e0fe924b5cd1ed04885a6c86ebe3710e8f3a89bead31e3e9cf3c78 that motivates why buffer location must be specified for IPA flow.
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And add the same to buffer_kernel.hpp in the !IS_BSP clause.
tiwaria1
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Sep 21, 2023
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| // The USM pointers passed into the kernel must match with the buffer location | ||
| // of each kernel argument, i.e. the allocated host memory should be in | ||
| // the location "0", as requested in ZeroCopyKernel |
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| // The USM pointers passed into the kernel must match with the buffer location | |
| // of each kernel argument, i.e. the allocated host memory should be in | |
| // the location "0", as requested in ZeroCopyKernel | |
| // The USM pointers passed into the kernel must be allocated with the same | |
| // buffer_location as the one specified on the kernel argument with the | |
| // annotated_arg class. |
tiwaria1
approved these changes
Sep 21, 2023
yuguen
approved these changes
Sep 22, 2023
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Description
This change updates
zero_copy_kernelsample on how the buffer locations are being selected in the sample to match the new 2024.0 IPA interfaces definitions.In
zero_copy_kernelboth accessor (requiring device allcoated memory) and USM host pointer are used. In full-system flow, the board spec has defined a device global memory and a host/shared global memory. While in IP-Authoring flow,buffer_locationshould be specified onaccessorandannotated_argso the compiler can infer global memory interfaces and generate board spec.Type of change
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How Has This Been Tested?
Please describe the tests that you ran to verify your changes. Provide instructions so we can reproduce. Please also list any relevant details for your test configuration